Computer System Architecture MCQ(GnduHub.BlogSpot.In)
1. RTL
stands for:
a. Random
transfer language
b.
Register
transfer language
c. Arithmetic
transfer language
d. All
of these
2. Which
operations are used for addition, subtraction, increment, decrement and
complement function:
a. Bus
b. Memory
transfer
c. Arithmetic
operation
d.
All of these
3. Which
language is termed as the symbolic depiction used for indicating the series:
a. Random
transfer language
b.
Register
transfer language
c. Arithmetic
transfer language
d. All
of these
4. The
method of writing symbol to indicate a provided computational process is called
as a:
a.
Programming language
b. Random
transfer language
c. Register
transfer language
d. Arithmetic
transfer language
5. In
which transfer the computer register are indicated in capital letters for
depicting its function:
a. Memory
transfer
b.
Register
transfer
c. Bus
transfer
d. None
of these
6. The
register that includes the address of the memory unit is termed as the ____:
a.
MAR
b. PC
c. IR
d. None
of these
7. The
register for the program counter is signified as_____:
a. MAR
b.
PC
c. IR
d. None
of these
8. In
register transfer the instruction register as:
a. MAR
b. PC
c.
IR
d. None
of these
9. In
register transfer the processor register as:
a. MAR
b. PC
c. IR
d.
RI
10. How many
types of micro operations:
a. 2
b.
4
c. 6
d. 8
11. Which are
the operation that a computer performs on data that put in register:
a. Register
transfer
b. Arithmetic
c. Logical
d.
All of these
12. Which micro
operations carry information from one register to another:
a.
Register
transfer
b. Arithmetic
c. Logical
d. All
of these
13. Micro
operation is shown as:
a. R1->R2
b.
R1<-R2
c. Both
d. None
14. In memory transfer location address is
supplied by____ that puts this on address bus:
a. ALU
b.
CPU
c. MAR
d. MDR
15. How many
types of memory transfer operation:
a. 1
b.
2
c. 3
d. 4
16. Operation
of memory transfer are:
a. Read
b. Write
c.
Both
d. None
17. In memory
read the operation puts memory address on to a register known as :
a. PC
b. ALU
c.
MAR
d. All
of these
18. Which
operation puts memory address in memory address register and data in DR:
a. Memory
read
b.
Memory write
c. Both
d. None
19. Arithmetic
operation are carried by such micro operation on stored numeric data available
in_____:
a.
Register
b. Data
c. Both
d. None
20. In
arithmetic operation numbers of register and the circuits for addition at
_____:
a.
ALU
b. MAR
c. Both
d. None
21. Which operation are implemented using a binary
counter or combinational circuit:
a. Register
transfer
b.
Arithmetic
c. Logical
d. All
of these
22. Which
operation are binary type, and are performed on bits string that is placed in register:
a.
Logical
micro operation
b. Arithmetic
micro operation
c. Both
d. None
23. A micro
operation every bit of a register is a:
a. Constant
b.
Variable
c. Both
d. None
24. Which
operation is extremely useful in serial transfer of data:
a. Logical
micro operation
b. Arithmetic
micro operation
c.
Shift micro
operation
d. None
of these
25. Which
language specifies a digital system which uses specified notation:
a.
Register
transfer
b. Arithmetic
c. Logical
d. All
of these
26. IR stands
for:
a. Input
representation
b.
Intermediate
representation
c. Both
d. None
27. HDL stands
for:
a. Human
description language
b.
Hardware
description language
c. Hardware
description land
d. None
of these
28. VPCC stands
for:
a. Variable
portable C compiler
b.
Very
portable C compiler
c. Both
d. None
29. In register transfer which system is a
sequential logic system in which flip-flops and gates are constructed:
a.
Digital
system
b. Register
c. Data
d. None
30. High level
language C supports register transfer technique for______ application:
a.
Executing
b. Compiling
c. Both
d. None
31. A counter
is incremented by one and memory unit is considered as a collection of _______:
a. Transfer
register
b.
Storage
register
c. RTL
d. All
of these
32. Which is the straight forward register
transfer the data from register to another register temporarily:
a. Digital
system
b. Register
c. Data
d.
Register
transfer operations
33. In
organization of a digital system register transfer of any digital system
therefore it is called:
a. Digital
system
b. Register
c. Data
d.
Register
transfer level
34. The binary
information of source register chosen by:
a. Demultiplexer
b.
Multiplexer
c. Both
d. None
35. Which
control transfer passes the function via
control______:
a. Logic
b. Operation
c.
Circuit
d. All
of these
36. Register
are assumed to use positive-edge-triggered _____:
a.
Flip-flop
b. Logics
c. Circuit
d. Operation
37. IDE stands
for:
a. Input
device electronics
b.
Integrated
device electronic
c. Both
d. None
38. ATA stands
for:
a.
Advance
technology attachment
b. Advance
teach attachment
c. Both
d. None
39. The memory
bus is also referred as______:
a.
Data bus
b. Address
bus
c. Memory
bus
d. All
of these
40. How many parts of memory bus:
a.
2
b. 3
c. 5
d. 6
41. A three
state gate defined as:
a. Analog
circuit
b. Analog
fundamentals
c. Both
a&b
d.
Digital
circuit
42. In 3 state
gate two states act as signals equal to:
a. Logic
0
b. Logic
1
c. None
of these
d.
Both a &
b
43. In 3 state
gate third position termed as high impedance state which acts as:
a.
Open circuit
b. Close
circuit
c. None
of these
d. All
of above
44. In every
transfer, selection of register by bus is decided by:
a.
Control
signal
b. No
signal
c. All
signal
d. All
of above
45. every bit of register has:
a. 2
common line
b. 3
common line
c.
1 common
line
d. none
of these
46. DDR2 stands
for:
a.
Double data
rate 2
b. Data
double rate 2
c. Dynamic
data rate 2
d. Dynamic
double rate 2
47. SDRAM
stands for:
a. System
dynamic random access memory
b.
Synchronous
dynamic random access memory
c. Both
d. None
48. Which is
referred as a sequential circuit which contains the number of register as per
the protocol:
a. RTL
b.
RAM
c. MAR
d. All
of these
49. Which
operation refer bitwise manipulation of contents of register:
a.
Logical
micro operation
b. Arithmetic
micro operation
c. Shift
micro operation
d. None
of these
50. Which
symbol will be used to denote an micro operation:
a. (^)
b.
(v)
c. Both
d. None
51. which
symbol will be denote an AND micro operation:
a.
(^)
b. (v)
c. Both
d. None
52. Which
operation are associated with serial transfer of data:
a. Logical
micro operation
b. Arithmetic
micro operation
c.
Shift micro
operation
d. None
of these
53. The bits
are shifted and the first flip-flop receives its binary information from
the_____:
a. Serial
output
b.
Serial input
c. Both
d. None
54. How many types of shift micro operation:
a. 2
b. 4
c.
6
d. 8
55. Which shift
is a shift micro operation which is used to shift a signed binary number to the
left or right:
a. Logical
b.
Arithmetic
c. Both
d. None
of these
56. which shift
is used for signed binary number:
a. Logical
b.
Arithmetic
c. Both
d. None
of these
57. Arithmetic
left shift is used to multiply a signed number by_____:
a. One
b.
Two
c. Three
d. All
of these
58. The
variable of_______ correspond to hardware register:
a. RAM
b.
RTL
c. ALU
d. MAR
59. In which
shift is used to divide a signed number by two:
a. Logical right-shift
b.
Arithmetic right shift
c. Logical
left shift
d. Arithmetic
left shift
60. How evolved
in register transfer language and where:
a. Chirsfraser
1980
b. J.davidson
1980
c. Chirs
fraser 1920
d. J.davidson
1920
e.
A and B
f.
B and C
g. C
and D
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